Pixelated source polarization optimization for high-NA EUV lithography
- Authors
- 손승우
- Issue Date
- Apr-2025
- Publisher
- SPIE
- Keywords
- Optical lithography; EUVL; high NA; source optimization; polarized illumination
- Citation
- Optical and EUV Nanolithography XXXVIII, Proceedings Volume 13424, v.13424, no.19, pp 1 - 8
- Pages
- 8
- Indexed
- FOREIGN
- Journal Title
- Optical and EUV Nanolithography XXXVIII, Proceedings Volume 13424
- Volume
- 13424
- Number
- 19
- Start Page
- 1
- End Page
- 8
- URI
- https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/125201
- DOI
- 10.1117/12.3054302
- ISSN
- 0277-786X
1996-756X
- Abstract
- This paper proposes a pixelated source polarization optimization method to enhance lithographic performance in high-NA EUV lithography. While polarized illumination and source optimization are well-established techniques for improving critical lithographic metrics such as resolution and process window, conventional source optimization methods primarily focus on modifying the source shape distribution while keeping the polarization state fixed, which limits the full potential of optimization in advanced patterning. To overcome this limitation, source polarization optimization determines the optimal polarization angle for each individual point source, leading to significant improvements in lithographic performance. We systematically analyze the impact of pixelated polarization illumination in high-NA EUVL and show that an optimized pixelated polarization source enhances NILS, nDOF, and overall pattern fidelity, particularly for complex DRAM patterns incorporating L/S, diagonal, and C/H structures. Furthermore, by improving pattern fidelity and process margins, pixelated source polarization optimization enables the fabrication of smaller DRAM patterns, pushing the limits of high-NA EUVL in advanced memory manufacturing. Our findings show that pixelated polarization optimization is a viable approach for next-generation high-NA EUVL, improving pattern fidelity and enhancing process stability, ultimately helping to overcome scaling challenges in advanced semiconductor manufacturing.
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