Detailed Information
Cited 0 time in 
Cited 0 time in 
Cited 0 time in
Metadata Downloads
다층 배선 비아(Via)의 고주파 측정 기반 회로 모델링Circuit Modeling of Multi-Layer Interconnect Via based on High Frequency Measurement
- Other Titles
- Circuit Modeling of Multi-Layer Interconnect Via based on High Frequency Measurement
- Issue Date
- Jul-2009
- Publisher
- 대한전자공학회
- Citation
- 2009년도 대한전자공학회 하계종합학술대회, pp.407 - 408
- Indexed
- OTHER
- Journal Title
- 2009년도 대한전자공학회 하계종합학술대회
- Start Page
- 407
- End Page
- 408
- Abstract
- A via is experimentally characterized by using high-frequency s-parameter measurements. Test patterns are designed and fabricated by using a package process. They are measured by using VNA (vector network analyzer) up to 25GHz. The parasitic effects due to access lines for on-wafer probing are deembedded. Then modeling the via as T-type circuit, the circuit model parameters are determined. It is shown that the proposed technique has excellent agreement with the measured s-parameters.
- Files in This Item
- Go to Link
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.
Related Researcher
- EO, YUNG SEON
- ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)