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Fast and accurate quasi-three-dimensional capacitance determination of multilayer VLSI interconnects

Authors
Jin, WoojinEo, YungseonEisenstadt, WRShim, Jong In
Issue Date
Jun-2001
Publisher
Institute of Electrical and Electronics Engineers
Keywords
crosstalk; interconnect capacitance; multilayer; shielding effect; signal delay; VLSI interconnects
Citation
IEEE Transactions on Very Large Scale Integration (VLSI) Systems, v.9, no.3, pp 450 - 460
Pages
11
Indexed
SCIE
SCOPUS
Journal Title
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume
9
Number
3
Start Page
450
End Page
460
URI
https://scholarworks.bwise.kr/erica/handle/2021.sw.erica/46901
DOI
10.1109/92.929579
ISSN
1063-8210
1557-9999
Abstract
A new fast and accurate capacitance determination methodology for intricate multilayer VLSI interconnects is presented, Since a multilayer interconnect structure is too complicated to be directly tractable, it is simplified by investigating charge distributions within the system, The quasi-three-dimensional (3-D) capacitances of the structure are then determined by combining a set of solid-ground-based two-dimensional (2-D) capacitances and shielding effects that can be independently calculated from the simplified structure, The shielding effects due to the neighboring lines of a line can be analytically determined from the given layout dimensions, The solid-ground-based 2-D capacitances can also be quickly computed from the simplified structure. Thus, the proposed capacitance determination methodology is much more cost-efficient than conventional 3-D-based methods. It is shown that the calculated quasi-3-D capacitances have excellent agreement with 3-D held-solver-based results within 5% error.
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COLLEGE OF SCIENCE AND CONVERGENCE TECHNOLOGY > DEPARTMENT OF PHOTONICS AND NANOELECTRONICS > 1. Journal Articles
COLLEGE OF ENGINEERING SCIENCES > SCHOOL OF ELECTRICAL ENGINEERING > 1. Journal Articles

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EO, YUNG SEON
ERICA 공학대학 (SCHOOL OF ELECTRICAL ENGINEERING)
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