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A 200Gb/s PAM-4 Transmitter with Hybrid Sub-Sampling PLL in 28nm CMOS Technology Go to Link

Wang, Zhongkai; Choi, Minsoo; Kwon, Paul; Lee, Kyoungtae; Yin, Bozhi; Liu, Zhaokai; Park, Kwanseo; Biswas, Ayan; Han, Jaeduk; Du, Sijun, et al.

ArticleIssue Date2022CitationDigest of Technical Papers - Symposium on VLSI Technology, v.2022-June, pp 34 - 35

SCOPUS

A 24.6-29.6GHz Hybrid Sub-Sampling PLL with Tri-State Integral Path Achieving 44fs Jitter and -254.8dB FOM in 28nm CMOS Go to Link

Wang, Zhongkai; Choi, Minsoo; Kwon, Paul; Liu, Zhaokai; Yin, Bozhi; Lee, Kyoungtae; Park, Kwanseo; Biswas, Ayan; Han, Jaeduk; Du, Sijun, et al.

ArticleIssue Date2024CitationProceedings - IEEE International Symposium on Circuits and Systems, pp 1 - 5PublisherIEEE

SCISCIESCOPUS

A Real-Time, 1.89-GHz Bandwidth, 175-kHz Resolution Sparse Spectral Analysis RISC-V SoC in 16-nm FinFET Go to Link

Wang, Angie; Bae, Woorham; Han, Jae duk; Bailey, Stevo; Ocal, Orhan; Rigge, Paul; Wang, Zhongkai; Ramchandran, Kannan; Alon, Elad; Nikolic, Borivoje

ArticleIssue Date2019CitationIEEE Journal of Solid-State Circuits, v.54, no.7, pp 1993 - 2008PublisherInstitute of Electrical and Electronics Engineers

SCOPUS

A Ring-Oscillator Sub-Sampling PLL With Hybrid Loop Using Generator-Based Design Flow Go to Link

Wang, Zhongkai; Choi, Minsoo; Wright, John; Lee, Kyoungtae; Liu, Zhaokai; Yin, Bozhi; Han, Jaeduk; Du, Sijun; Alon, Elad

ArticleIssue Date2022CitationProceedings - IEEE International Symposium on Circuits and Systems, v.2022-May, pp.2881 - 2885PublisherInstitute of Electrical and Electronics Engineers Inc.

SCIESCOPUS

An Output Bandwidth Optimized 200-Gb/s PAM-4 100-Gb/s NRZ Transmitter With 5-Tap FFE in 28-nm CMOS Go to Link

Wang, Zhongkai; Choi, Minsoo; Lee, Kyoungtae; Park, Kwanseo; Liu, Zhaokai; Biswas, Ayan; Han, Jaeduk; Du, Sijun; Alon, Elad

ArticleIssue Date2021CitationIEEE Journal of Solid-State Circuits, v.57, no.1, pp 1 - 11PublisherInstitute of Electrical and Electronics Engineers

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Browsing by Wang, ZhongkaiAuthor

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