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In-depth Analysis of the Hafnia Ferroelectrics as a Key Enabler for Low Voltage & QLC 3D VNAND beyond 1K Layers: Experimental Demonstration and Modeling

Authors
Kim, GiukChoi, HyojunShin, HunbeomLee, SanghoLee, SangmokNam, YunseokJung, MinhyunMyeong, IlhoKim, KijoonWoo, JonghoLim, SuhwanKim, KwangsooKim, WankiHa, DaewonAhn, JinhoJeon, Sanghun
Issue Date
Jun-2024
Citation
Digest of Technical Papers - Symposium on VLSI Technology, pp 1 - 2
Pages
2
Indexed
SCOPUS
Journal Title
Digest of Technical Papers - Symposium on VLSI Technology
Start Page
1
End Page
2
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/195335
DOI
10.1109/VLSITechnologyandCir46783.2024.10631559
ISSN
0743-1562
Abstract
In this work, we experimentally demonstrate a remarkable performance improvement, boosted by the interaction of charge trapping & ferroelectric (FE) switching effects in metal-band engineered gate interlayer (BE-G.IL)- FE-channel interlayer (Ch.IL)-Si (MIFIS) FeFET. The MIFIS with BE-G.IL (BE-MIFIS) facilitates the maximized 'positive feedback' (Posi. FB.) of dual effects, leading to low operation voltage (VPGM/VERS: +17/-15 V), a wide memory window (MW: 10.5 V) and negligible disturb at a biased voltage of 9 V. Furthermore, our proposed model verifies that the performance enhancement of the BE-MIFIS FeFET is attributed to the intensified posi. FB. This work proves that the hafnia FE can play as a key enabler in extending the technology development of 3D VNAND, which is currently approaching a state of stagnation.
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COLLEGE OF ENGINEERING (SCHOOL OF MATERIALS SCIENCE AND ENGINEERING)
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