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Tailoring Crystal Growth via Sn Incorporation for High-Performance ALD IGO FETs
- Authors
- Kim, Gwang-bok; Jeong, Joo-hee; Park, Soojin; Choi, Sunghyun; An, Jiseong; Park, Kwangmin; Jeong, Jae Kyeong
- Issue Date
- Oct-2025
- Publisher
- Institute of Electrical and Electronics Engineers
- Keywords
- Atomic Layer Deposition; Crystallization; Indium Gallium Tin Oxide; Oxide Semiconductor; Thin-film Transistor; Field Effect Transistors; Gallium Compounds; Grain Boundaries; Grain Growth; Mos Devices; Oxide Semiconductors; Semiconducting Indium; Semiconducting Indium Compounds; Semiconducting Tin Compounds; Thin Film Circuits; Threshold Voltage; Tin Oxides; Atomic-layer Deposition; Back End Of Lines; C. Thin Film Transistor (tft); Carriers Transport; Doped Oxides; Field-effect Transistor; Grain Boundary Densities; High Mobility; Performance; Sn-doped; Atomic Layer Deposition; Crystallization; Thin Film Transistors
- Citation
- IEEE Electron Device Letters, v.46, no.10, pp 1781 - 1784
- Pages
- 4
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE Electron Device Letters
- Volume
- 46
- Number
- 10
- Start Page
- 1781
- End Page
- 1784
- ISSN
- 0741-3106
1558-0563
- Abstract
- This study presents high-performance field-effect transistors (FETs) using atomic layer deposition (ALD)-derived Sn-doped oxide semiconductors for back-end-of-line (BEOL)-compatible applications. Optimized Sn incorporation promoted (222) face crystal growth, reducing grain boundary density and enhancing carrier transport. The resulting FET exhibited a high mobility of 79.5 cm2/Vs, a low subthreshold swing of 61.0 mV/dec, and stable enhancement-mode operation. Reliability tests confirmed minimal threshold voltage shifts under external bias temperature stress, demonstrating the potential of ALD-based oxide semiconductors for next-generation memory applications.
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Related Researcher
- Jeong, Jae Kyeong
- COLLEGE OF ENGINEERING (SCHOOL OF ELECTRONIC ENGINEERING)