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Crystalline IGO TFTs with High Reliability under DRAM-Compatible 600 °C N2 Thermal Budgets

Authors
Oh, Jeong EunKim, NahyunChae, JiwonCho, Min HeeHa, DaewonJeong, Jae Kyeong
Issue Date
May-2026
Publisher
Institute of Electrical and Electronics Engineers Inc.
Keywords
atomic layer deposition; crystallization; high thermal budget; indium gallium oxide; thin-film transistors
Citation
IEEE Electron Device Letters, v.47, no.5, pp 925 - 928
Pages
4
Indexed
SCIE
SCOPUS
Journal Title
IEEE Electron Device Letters
Volume
47
Number
5
Start Page
925
End Page
928
URI
https://scholarworks.bwise.kr/hanyang/handle/2021.sw.hanyang/217624
DOI
10.1109/LED.2026.3675621
ISSN
0741-3106
1558-0563
Abstract
High-performance crystalline IGO (c-IGO) TFTs are demonstrated for 600 ∘ C DRAM integration, where the crystalline lattice plays a critical role in preventing interfacial intermixing. In amorphous IGO TFTs, extensive Al intermixing with the adjacent Al2O3 layers inhibits channel crystallization, resulting in a degraded mobility of 25.6 cm2/Vs. Conversely, the crystalline IGO effectively suppresses Al diffusion, enabling a superior mobility of 89.9 cm2/Vs and a sharp subthreshold swing of 80 mV/decade. Furthermore, c-IGO TFT exhibits superior PBTS stability ( ΔVTH of -10 mV at 4 MV/cm, 80 ∘ C, 3600 sec), proving that channel crystallization is a robust strategy to mitigate intermixing-induced structural and electrical degradation in high-temperature DRAM fabrication processes.
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