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Characterization of High-Performance InGaAs QW-MOSFETs With Reliable Bi-Layer HfOxNy Gate Stack

Authors
Eom, Su-KeunKong, Min-WooCha, Ho-YoungSeo, Kwang-Seok
Issue Date
2019
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords
Indium gallium arsenide (InGaAs); III-V MOSFET; high-k gate dielectric; hafnium oxynitride (HfOxNy); PBTI reliability
Citation
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, v.7, no.1, pp.908 - 913
Journal Title
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY
Volume
7
Number
1
Start Page
908
End Page
913
URI
https://scholarworks.bwise.kr/hongik/handle/2020.sw.hongik/2772
DOI
10.1109/JEDS.2019.2934745
ISSN
2168-6734
Abstract
In this work, we report high-performance InGaAs quantum-well MOSFETs with optimized bi-layer high-k gate dielectrics incorporating high-quality plasma-assisted atomic -layer-deposited (PA-ALD) HfOxNy interfacial layer (IL). With more than 1 nm IL deposition to passivate the InGaAs surface, excellent sub-threshold characteristics (SSmin = 68 mV/dec) were achieved through the proposed gate stack technology. We performed positive-bias-temperature-instability (PBTI) measure -ments in order to ensure a reliable gate operation. The proposed bi-layer III-V gate stack achieved the excellent value of maximum gate overdrive voltage (V-OV,V-max) of 0.49 V with CET = 1.04 nm. The proposed gate stack has a great potential for III-V MOSFET technology to low power logic applications.
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