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Browsing by Jeong, Deog-KyoonAuthor

Showing results 1 to 13 of 13

SCOPUS

A -247.1 dB FoM, -77.9dBc Reference Spur Ring-Oscillator-Based Injection-Locked Clock Multiplier with Multi-Phase-Based Calibration Go to Link

Song, Yeonggeun; Ha, Kyoungjoon; Ko, Han-Gon; Choo, Min-Seong; Jeong, Deog-Kyoon

ArticleIssue Date2022CitationESSCIRC 2022 - IEEE 48th European Solid State Circuits Conference, Proceedings, pp 249 - 252PublisherInstitute of Electrical and Electronics Engineers Inc.

SCISCIESCOPUS

A 10-Gb/s, 0.03-mm2, 1.28-pJ/bit Half-Rate Injection-Locked CDR With Path Mismatch Tracking Loop in a 28-nm CMOS Technology Go to Link

Choo, Min-Seong; Park, Kwanseo; Ko, Han-Gon; Cho, Sung-Yong; Lee, Kwangho; Jeong, Deog-Kyoon

ArticleIssue Date2019CitationIEEE Journal of Solid-State Circuits, v.54, no.10, pp 2812 - 2822PublisherInstitute of Electrical and Electronics Engineers

SCOPUS

A 14-to-32-Gb/s Deadzone-Free Referenceless CDR with Autocovariance-based Frequency Detector in 40-nm CMOS Technology

Choi, Hong-Seok; Lee, Jae-Geon; Lee, Kwang-Ho; Koh, Daehyun; Sull, Jung-Woo; Do, Hyung-Rok; Kye, Chan-Ho; Jeong, Deog-Kyoon; Choo, Min-Seong

ArticleIssue Date2024Citation2024 IEEE Asian Solid-State Circuits Conference, A-SSCC 2024, v.12, no.1, pp 1 - 3PublisherInstitute of Electrical and Electronics Engineers Inc.

SCIESCOPUS

A 14-to-32-Gb/s Deadzone-Free Referenceless CDR With Autocovariance-Based Seamless Frequency Detector in 40-nm CMOS Technology Go to Link

Choi, Hong-Seok; Lee, Jae-Geon; Gong, Seung-Hwan; Lee, Kwang-Ho; Koh, Daehyun; Sull, Jung-Woo; Do, Hyungrok; Kye, Chan-Ho; Jeong, Deog-Kyoon; Park, Kwanseo, et al.

ArticleIssue Date2025CitationIEEE JOURNAL OF SOLID-STATE CIRCUITS, pp 1 - 11PublisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC

SCISCIESCOPUS

A 15-GHz, 17.8-mW, 213-fs Injection-Locked PLL With Maximized Injection Strength Using Adjustment of Phase Domain Response Go to Link

Choo, Min-Seong; Song, Yeonggeun; Cho, Sung-Yong; Ko, Han-Gon; Park, Kwanseo; Jeong, Deog-Kyoon

ArticleIssue Date2019CitationIEEE Transactions on Circuits and Systems II: Express Briefs, v.66, no.12, pp 1932 - 1936PublisherInstitute of Electrical and Electronics Engineers

SCISCIESCOPUS

A 2.5–5.6 GHz Subharmonically Injection-Locked All-Digital PLL With Dual-Edge Complementary Switched Injection Go to Link

Cho, Sung-Yong; Kim, Sungwoo; Choo, Min-Seong; Ko, Han-Gon; Lee, Jinhyung; Bae, Woorham; Jeong, Deog-Kyoon

ArticleIssue Date2018CitationIEEE Transactions on Circuits and Systems I: Regular Papers, v.65, no.9, pp 2691 - 2702PublisherInstitute of Electrical and Electronics Engineers

SCIESCOPUSKCI

A 285-fsrms Integrated Jitter Injection-Locked Ring PLL with Charge-Stored Complementary Switch Injection Technique Go to Link

Kim, Sungwoo; Jang, Sungchun; Cho, Sung-Yong; Choo, Min-Seong; Jeong, Gyu-Seob; Bae, Woorham; Jeong, Deog-Kyoon

ArticleIssue Date2016CitationJOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.16, no.6, pp 860 - 866Publisher대한전자공학회

SCIESCOPUS

A 4-20-Gb/s 1.87-pJ/b Continuous-Rate Digital CDR Circuit With Unlimited Frequency Acquisition Capability in 65-nm CMOS Go to Link

Park, Kwanseo; Lee, Kwangho; Cho, Sung-Yong; Lee, Jinhyung; Hwang, Jeongho; Choo, Min-Seong; Jeong, Deog-Kyoon

ArticleIssue Date2020CitationIEEE Journal of Solid-State Circuits, v.56, no.5, pp 1597 - 1607PublisherInstitute of Electrical and Electronics Engineers

SCIESCOPUSKCI

A 4.5-to-14 GHz PLL-based Clock Driver with Wide-range 3-shaped LC-VCOs for GDDR6 DRAM Test Go to Link

Kye, Chan-Ho; Kim, Jihee; Jeong, Deog-Kyoon; Choo, Min-Seong

ArticleIssue Date2024CitationJOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.24, no.3, pp 284 - 288Publisher대한전자공학회

SCISCIESCOPUS

A 55.1 mW 1.62-to-8.1 Gb/s Video Interface Receiver Generating up to 680 MHz Stream Clock Over 20 dB Loss Channel Go to Link

Park, Kwanseoauth; Lee, Jinhyungauth; Lee, Kwanghoauth; Choo, Min-Seongauth; Jang, Sungchunauth; Chu, Sang-Hyeokauth; Kim, Sungwooauth; Jeong, Deog-Kyoon

ArticleIssue Date2017CitationIEEE Transactions on Circuits and Systems II: Express Briefs, v.64, no.12, pp 1432 - 1436PublisherInstitute of Electrical and Electronics Engineers

SCIESCOPUS

A PVT Variation-Robust All-Digital Injection-Locked Clock Multiplier With Real-Time Offset Tracking Using Time-Division Dual Calibration Go to Link

Choo, Min-Seong; Kim, Sungwoo; Ko, Han-Gon; Cho, Sung-Yong; Park, Kwanseo; Lee, Jinhyung; Shin, Soyeong; Chi, Hankyu; Jeong, Deog-Kyoon

ArticleIssue Date2021CitationIEEE Journal of Solid-State Circuits, v.56, no.8, pp 2525 - 2538PublisherInstitute of Electrical and Electronics Engineers

SCIESCOPUS

A Supply Noise-Insensitive Ring DCO With a Self-Biased Shunt Regulator Array in Wide-Range Digital PLL Go to Link

Baek, Kyungmin; Kim, Jiho; Kim, Kahyun; Jeong, Deog-Kyoon; Choo, Min-Seong

ArticleIssue Date2025CitationIEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.33, no.8, pp 1 - 5PublisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC

SCISCIESCOPUS

An Optimum Injection-Timing Tracking Loop for 5-GHz, 1.13-mW/GHz RO-Based Injection-Locked PLL With 152-fs Integrated Jitter Go to Link

Choo, Min-Seong; Ko, Han-Gon; Cho, Sung-Yong; Lee, Kwangho; Jeong, Deog-Kyoon

ArticleIssue Date2018CitationIEEE Transactions on Circuits and Systems II: Express Briefs, v.65, no.12, pp 1819 - 1823PublisherInstitute of Electrical and Electronics Engineers

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Browsing by Jeong, Deog-KyoonAuthor

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